Author

Yi Ram Kim

ORCID Identifier(s)

0000-0002-4359-9522

Graduation Semester and Year

2021

Language

English

Document Type

Dissertation

Degree Name

Doctor of Philosophy in Materials Science and Engineering

Department

Materials Science and Engineering

First Advisor

Jin Seong Koh

Abstract

The primary concern of this dissertation is the electromigration (EM) failure mechanism found in Sn-Ag-Cu (SAC) solder alloys integrated in WCSP (wafer-level chip scale package) packaging structure and factors affecting the failure mechanisms. To the end, accelerated electromigration (EM) tests are conducted on SnAgCu (SAC) solder interconnects in wafer-level chip scale packages (WCSPs or WLCSPs) with different package structures and use-condition parameters. The package structure parameters include different under bump metallization (UBM) thicknesses, Sn grain orientation, while the various in use conditions includes pulsed direct current (DC), and alternating current (AC). The major findings made in the studies are presented in separate chapters outlined as below. In Chapter 2, the effects of the UBM thickness on the EM reliability of SAC solder joints are studied and presented. One of the highlighting findings of this study is a discovery of a hidden mechanism controlling the EM failure mechanism occurs with the classical EM failure mechanism. The hidden EM failure mechanism is suggested based on the observation that the EM resistance does not show a linear increase with UBM thickness. Nor does the EM reliability become saturated after a critical UBM thickness. Instead, the EM reliability decreases above a certain critical limit in the UBM thickness. Since a thicker UBM has a greater amount of Cu supply, the observation contradicts the conventional view on the role of UBM that prolongs EM failure. The initial hypothesized explanation to this finding is that the increased exposure of fast EM diffusion Sn grain orientation or weak-links at the Cu UBM and SAC interface as UBM gets thicker. This is based on a more evenly distributed EM flux across the interface by reducing current crowding effect at the corners of the interconnect. However, a comparative EM study by switching the current flow configuration to reduce the current crowding effect yielded results that disagree with this proposition. It is found that the impact of the level of current crowding on EM reliability does not differ much with different the UBM thickness. This defies the initial speculation that there would be a smaller improvement in EM reliability in thicker UBM samples when the current configuration is switched. These results suggest that the UBM thickness affects the EM failure mechanism in a more complicated manner. Considering hidden factors such as the compressive stress that acts against the growth of the EM void is necessary in order to better understand the mechanism. Chapter 3 presents the effects of Sn’s grain orientation on EM failure kinetics. Comprehensive studies of EM reliability of solder interconnects have suggested that early EM failure may have different failure kinetics depending on the grain orientation of Sn within the solder bump. The Sn has anisotropic properties because of its body centered tetragonal (BCT) crystal structure. Sn has a fast EM diffusion at a grain orientation of [001] or along c-axis due to its relatively larger diffusion path compared to other orientations. Both early failures and late failures from the same accelerated EM tests are characterized with scanning electron microscopy (SEM) and electron backscattered diffraction (EBSD) to study a relationship between early EM failure and Sn grain orientation. SEM analysis does not show distinctive microstructure differences between early and late failure features. EBSD analysis shows a distinctive feature of Sn grain orientation. The early failures have a high concentration of Sn’s c-axis alignment with the EM current direction, while the late failures have less or no c-axis alignment of the Sn grain orientations. The failure analysis suggests that the c-axis alignment with the EM current direction near the Cu and SAC interface accelerates the EM failure kinetics, causing early EM failures. The early failures are detrimental to reliability assessments as they skew test data. Chapter 4 reports a simple way to mitigate the early EM failures using a substrate effect that induces a biased nucleation of Sn grain orientations. Since the Sn’s c-axis alignment accelerates the EM kinetics and causes early EM failures, the utilization of the substrate effect is chosen to give preferred reflowed Sn grain orientations. The various sizes of SAC solder balls ranging from 200µm to 760µm are reflowed on polycrystalline Cu substrates and (111), (110), and (100) textured single crystal Cu substrates. The EBSD analysis of reflowed SAC solder balls reveals that a substrate effect is a simple and effective way to mitigate Sn grain orientation effects on EM reliability. The EBSD analysis and key findings are presented and discussed in this chapter. Chapter 5 discusses the effects of non-DC load on EM failure mechanism, kinetics, and microstructure are studied using low frequency pulsed-DC. This study is conducted because the understanding of non-DC effects is significantly lacking because of difficulty of setting up tests. The failure kinetics of non-DC conditions were expected to follow a cumulative model, which only accounts EM damage during the “on” time. The accelerated EM tests of WCSP samples are conducted under 4 different low frequency pulsed-DC conditions: 0.1Hz pulsed-DC with duty factors (DFs) of 33%, 50%, 75%, and 100% (DC). The EM failure kinetics shows a highly nonlinear relationship with the DF. The result of EM test suggests that there are at least two competing factors affecting the EM failure kinetics in an opposite manner under low frequency pulsed-DC EM conditions. Specifically, the failure kinetics are accelerated at high DF and decelerated at low DF. The resistance change data with a 2-stage EM failure further supports two EM acceleration and deceleration failure mechanisms. Failure analysis finds a new observation of unique failure mode involving three mechanisms in SAC solder interconnects subjected to low frequency pulsed-DC conditions: 1) EM, 2) temperature fluctuation-induced mechanical fatigue, and 3) dynamic recrystallization. The two mechanisms, the classical EM mechanism and a secondary EM acceleration mechanism, contribute to failure in tandem, a phenomenon which has not been observed in the past. A unique observation of these two mechanisms is that thermal fatigue accelerates EM failure kinetics. Evidence of fatigue crack formation and growth across the solder joint along with fluctuating temperature and stress with pulsing “on” and “off” current obtained through cross-sectional failure analysis of failed samples and a finite element method (FEM) model, respectively. The low DF samples have exponentially increased EM lifetime, suggesting EM failure deceleration mechanism unlike high DF pulsed-DC samples. The squeeze-out SAC solder deformation indicates an involvement of dynamic recrystallization that causes superplasticity. The dynamic recrystallization decelerates EM failure kinetics by removing fast EM diffusing grain orientation and reducing work hardening of SAC. The fine grain sizes of SAC under EBSD further support the dynamic recrystallization of SAC solder. Chapter 6 presents the effect of alternating current load condition on EM mechanism because low-frequency pulsed-DC has effects on EM mechanisms which are far too complicated, such as thermal-mechanical fatigue and dynamic recrystallization. Comparative AC EM tests with varying frequencies and DFs are conducted to remove the complicated thermal fluctuation. The common assumptions of AC effects on EM are that samples fails with the classical EM failure mechanism with its failure microstructures with an effect of material healing or recovery. Based on the damage recovery model, the higher-frequency AC would fail slower than lower-frequency AC would do because higher-frequency AC has more effective EM healing effects. However, the accelerated AC EM tests reveal that the samples under high-frequency AC fail faster than those under low-frequency AC. Furthermore, the IMCs of failed samples tested under AC completely differ from classical EM-induced IMC formation, which is Cu6Sn5 and Cu3Sn near the anode side of interconnects. The IMCs are formed in the middle of the solder interconnects. The faster failure rate of high-frequency AC and the abnormal IMC microstructure suggest two things. First, the assumed healing effects are not as extensive as assumed. Second, the IMC formation and dissolution are not spontaneous, as assumed, but have different rates.

Keywords

Electromigration, Failure mechanism, Wafer-level chip scale package, Pulsed direct current, Alternating current, UBM thickness, Sn grain orientation, Substrate effect

Disciplines

Engineering | Materials Science and Engineering

Comments

Degree granted by The University of Texas at Arlington

30221-2.zip (78101 kB)

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