A High Frequency Memristor Emulator Circuit

Author

Manu Chilukuri

Graduation Semester and Year

2015

Language

English

Document Type

Thesis

Degree Name

Master of Science in Electrical Engineering

Department

Electrical Engineering

First Advisor

Sungyong Jung

Abstract

In this thesis, a low power, high frequency memristor emulator has been designed. The purpose of emulator circuit is to mimic the behavior of a memristor. The circuit consists of a summing amplifier, an integrator and a multiplier. The circuit has been implemented using commercial off the shelf (COTS) components in Keysight ADS simulation tool. For CMOS implementation, the emulator circuit has been designed using IBM 0.18um technology. The design of each circuit has been explained in this work. The Opamp designed achieves a gain of 89 dB, output swing of 1.584V and a bandwidth of 3.67 MHz. The circuit designed using Cadence Spectre provides results consistent with the block level simulation. From the simulations, it is observed that the circuit exhibits memristive behavior up to 16 kHz, after which the circuit behaves as a simple resistor. This circuit can be used to compensate process variations in amplifiers, can be programmed to required resistance values by applying a train of pulses with proper count, amplitude and duration

Keywords

Memristor, Integrator, Gilbert cell multiplier, Opamp

Disciplines

Electrical and Computer Engineering | Engineering

License

This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.

Comments

Degree granted by The University of Texas at Arlington

Recommended Citation

Chilukuri, Manu, "A High Frequency Memristor Emulator Circuit" (2015). Electrical Engineering Theses. 379.
https://mavmatrix.uta.edu/electricaleng_theses/379