Graduation Semester and Year
2010
Language
English
Document Type
Thesis
Degree Name
Master of Science in Electrical Engineering
Department
Electrical Engineering
First Advisor
Alan W. Davis
Abstract
An RF ultra wide band low noise amplifier designed for the frequency range of 12-18 GHz of operation is presented in this paper. The low noise amplifier is designed using the state-of-the-art complementary metal oxide semiconductor 45 nm technology. Berkeley's Predictive Technology Model (PTM) is used to generate a fairly accurate mathematical model and the SPICE data is implemented into the BSIM 4 version of the Advanced Design Systems (ADS) program. The low noise design strategy is mainly based on the analysis of high frequency CMOS operation. This LNA has two stages: the first stage is a RL feedback amplifier with an inductive load, and the second stage is a RC feedback amplifier with an inductive load. High frequency small signal MOSFET models with shunt-shunt feedback are used to determine the input impedance, output impedance and gain equations governing this circuit. Simulation results of this two stage feedback amplifier demonstrate a gain of 19 dB over a 6 GHz bandwidth, high linearity, and a low noise figure - less than 2.4 dB. This is a low voltage high current amplifier which requires a supply voltage of simply 0.5 V and has low power consumption (~13.5 mW).
Disciplines
Electrical and Computer Engineering | Engineering
License
This work is licensed under a Creative Commons Attribution-NonCommercial-Share Alike 4.0 International License.
Recommended Citation
Bhadravati Mohankumar, Nahusha, "An Ultra Wide Band CMOS Low Noise Amplifier Design" (2010). Electrical Engineering Theses. 200.
https://mavmatrix.uta.edu/electricaleng_theses/200
Comments
Degree granted by The University of Texas at Arlington