ORCID Identifier(s)


Graduation Semester and Year




Document Type


Degree Name

Doctor of Philosophy in Electrical Engineering


Electrical Engineering

First Advisor

Kambiz Alavi

Second Advisor

Joseph H Ngai


The epitaxial growth of crystalline oxides on semiconductors provides a pathway to introduce new functionalities to semiconductor devices. Key to coupling crystalline oxides to semiconductors electrically, to realize functional behavior, is controlling the manner in which their bands align at the interfaces. This document reports on the three research projects on Crystalline Oxide/Semiconductor heterostructures. In the first project we applied principles of band-gap engineering traditionally used at heterojunctions between conventional semiconductors to control the band offset between a single crystalline oxide and a semiconductor. Reactive molecular beam epitaxy is used to realize atomically abrupt and structurally coherent interfaces between SrZrxTi1-xO3 and Ge, in which the band-gap of the former is increased with increasing Zr content x. Structural and electrical characterization of SrZrxTi1-xO3-Ge heterojunctions for x = 0.2 to 0.75 is performed and reported. The results demonstrate that by increasing the Zr content the band offset between the oxide an semiconductor can transition from type-II to type-I. In the second project ferroelectric materials integrated on semiconductors were particularly studied, which could lead to low-power field-effect devices that can be used for logic and memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x = 0.7) that has been epitaxially grown on Ge. We find that the ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm corresponding to an equivalent-oxide-thickness of just 1.0 nm exhibit a ~ 2 V hysteretic window in the capacitance-voltage characteristics. The development of ferroelectric MOS capacitors with ultrathin nanoscale gate thicknesses opens new perspectives for electronic devices. Finally, in the third project the interface trap density of the thin film SrZrxTi1-xO3 on Ge was studied and it was shown that the interface trap density of such structures can be dependent to the history of the junction and polarization state.


Oxide MBE, Thin film ferroelectric, Semiconductors


Electrical and Computer Engineering | Engineering


Degree granted by The University of Texas at Arlington