Agat Hirachan

Graduation Semester and Year

2012

Language

English

Document Type

Thesis

Degree Name

Master of Science in Aerospace Engineering

Department

Mechanical and Aerospace Engineering

First Advisor

Dereje Agonafer

Abstract

Due to localized high heat fluxes, hot-spots are created in silicon chips. Cooling of the hot-spots is one of the major thermal challenges in today's integrated circuit (IC) industry. Many researches have been conducted to find ways to cool hot-spots using different techniques as uniform heating is highly desired. First part of the thesis focuses on cooling of hot-spot using conventional thermoelectric cooler (Melcor_CP1.0-31-05L.1) and a micro heat pipe. A chip package with conventional integrated heat spreader and heat sink was designed. Hot-spot was created at the center of the silicon die with background heat at rest of the area. The heat flux on the hot-spot was much greater than rest of the area. Forced convection was used to cool IC package, temperature was observed at active side of the silicon die. After that a copper conductor was used to take away heat directly from the hot-spot of the silicon die to the other end of the conductor which was cooled using the thermoelectric cooler. Finally the conductor was replaced by a heat pipe and a comparison between three cases was done to study the cooling performance using the CFD based commercial software, ANSYS Icepak. The effect of trench on silicon die was also studied. Second part of the thesis deals with thermal and structural aspects of design when thin film thermoelectric cooler (TFTEC) was embedded in the flip chip package for hot spot removal. A full thermo-mechanical model of flip chip package, heat spreader, under fill, solder balls, substrate, copper pads, printed circuit board and heat sink was designed along with TFTEC. Background heat at bottom face of silicon die and hot spot at center of the silicon die was created which represents the heat generated by the transistors in the chip package. Modeling and finite element analysis was done using ANSYS Workbench. Maximum junction temperature in the die, shear stress in solder balls and copper pads, and normal stress in the die of conventional flip chip package was compared with flip chip with TFTEC embedded in integrated heat spreader and flip chip package with TFTEC embedded in the silicon die for hot spot removal.

Disciplines

Aerospace Engineering | Engineering | Mechanical Engineering

Comments

Degree granted by The University of Texas at Arlington

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