ORCID Identifier(s)


Graduation Semester and Year




Document Type


Degree Name

Doctor of Philosophy in Mechanical Engineering


Mechanical and Aerospace Engineering

First Advisor

Dereje Agonafer


III-V materials such as Gallium Arsenide (GaAs) and Indium Phosphide (InP) are used as substrates for opto-electronic devices like vertical cavity surface emitting lasers (VCSEL), edge emitting lasers and light emitting diodes. System in Package integration of the III-V materials to silicon requires a reliable bonding technique. Though there are several bonding techniques like direct wafer bonding like hetero-epitaxially grown islands on a silicon wafer bonding enable the bonding, flip-chip bonding is used in this study owing to its superior electrical connectivity, mechanical reliability, heat conduction capability and ease of fabrication due to self-alignment. Finite element models of four different interconnect designs solder balls, flat pads, semi-annular and annular interconnects are studied for their effective thermal dissipation. The efficiency of the proposed designs is studied for mechanical stresses under thermal cycling. CTE mismatch between the GaAs substrate and SiO2 layers gives rise to mechanical stresses in the interconnects. The models are validated with test vehicles fabricated using standard deposition and lift off processes. The present study aims at understanding the reliability of the indium interconnects in different shapes used to integrate GaAs substrate and silicon on insulator (SOI) wafers. The high-power density of lasers coupled with the low thermal conductivity of III-V substrates lead to thermal related failures in the devices. Thermal dissipation of the heat generated during laser production is paramount to the proper functioning of the devices. Coupling the III-V substate with SOI wafer gives a proper channel for the heat dissipation and aids in the proper functioning of laser diode. With the heterogenous integration roadmaps suggesting the saturation of Moore’s Law is inevitable, industries are looking at alternatives to pack more functionalities into the electronic packages. As they head towards 3D integration, interposers play a pivotal role in enabling the connections between different chips. Over the last two decades organic and silicon interposers have gained wide popularity and applications, but they are not devoid of limitations. The high cost of silicon interposer and relatively low interconnect density in organic interposer have propelled researchers to look at glass as interposer material. Glass interposers have high electrical resistivity, low cost and low insertion losses. Among a wide variety of glass interposers available, Borosilicate glass interposer with high thermal resistance, optical transmission and high chemical durability, is widely used in the electronic industry, especially in LCD panels owing to its CTE match with silicon and ease of panel-based processing. Copper filled Through Package Vias (TPVs) in glass interposers enable the communication between vertically stacked chips when the lateral communication is taken care of by re-distribution layers. The Coefficient of Thermal Expansion (CTE) mismatch between copper (~ 17.3 ppm/°C) and glass (~ 3.3 ppm/°C) contributes to non-uniform expansion at the interface of TPV and stresses during thermal cycling. The present study aims at using finite-element method to optimize the copper filled through glass via (TGV) or through package via geometry by investigating the stress at critical corners of the interface for different height to diameter ratios of TGV under thermal cycling. The affect of the change in the thickness of the interposer and the diameter of the via are assessed for various other components of the package configuration such as the solder interconnects connecting the chip and the glass interposer, the solder interconnects connecting glass interposer and the substrate, interfaces of the different chiplets in the package and its affect on the interposer itself. Submerging a cluster of servers inside a large tank is the customary way of employing single-phase immersion cooling. But this approach requires a complete renovation of existing air cooled infrastructure. A practical approach to converting an air cooled data center to immersion cooled data center can be retaining the rack and server arrangements and supplying each server with immersion liquid in sled configuration, retaining horizontal position. The present study aims at characterizing the thermal performance of a 2-socket server in sled and tank configurations using CFD. In the tank configuration model, the server is immersed vertically with the coolant supply from bottom to top as in the case of typical single-phase immersion deployments. In the sled configuration, the server orientation is retained (horizontally) and the fluid supply is modeled as an inlet and outlet manifold connected to the same side of the server. The CFD modeling approach is aimed to determine the heat transfer behavior of the server in two configurations being looked at was done for a commercially available dielectric immersion liquid, EC 110. A detailed baseline geometry of the server was first simplified, considering only the components that are significant source of heat and/or impact the server flow characteristics. Some of the components considered for analysis include CPU, storage drives and memory modules. The performance of the server in two configurations is compared to determine the efficiency of both the server configurations while ensuring the components do not exceed their respective thermal threshold. Component temperatures are obtained by varying the coolant flow rates and dielectric temperatures. The thermal conductivity of the immersion cooling liquid plays paramount role in determining the efficiency of the thermal dissipation system. To enhance the thermal properties of the immersion liquid EC110, Al2O3 nanoparticles are suspended in the base fluid, making nanofluid. Thermal performance improvements offered by the nanofluid are assessed against the thermal performance and heat dissipation offered by the base fluid.


Silicon photonics, III-V/Si integration, Glass interposer, Immersion cooling, Nanofluid, Packaging, 2.5D integration, 3D integration, Heterogenous integration, Co-packaging


Aerospace Engineering | Engineering | Mechanical Engineering


Degree granted by The University of Texas at Arlington

Available for download on Sunday, February 01, 2026