Graduation Semester and Year




Document Type


Degree Name

Master of Science in Electrical Engineering


Electrical Engineering

First Advisor

Soontorn Oraintara


The latest scalable video coding standard, H.264/SVC uses many components of H.264/AVC standard to maintain backward compatibility and also has proposed many tools to support scalable video coding with increased coding efficiency. SIP Analyzer is one such tool incorporated in JSVM (Joint Scalable Video Model) software which is the reference software for the SVC project. SIP Analyzer implements Selective Interlayer Prediction strategy to encode the bitstream so as to improve coding performance in scenarios where multiple adaptation is not needed without losing much if the same bitstream is used in scenario where multiple adaptation is needed. Core of this algorithm is a 0-1 Knapsack Problem that decides the right combination of lower layer frames for which interlayer prediction can be safely turned off. Current implementation solves the Knapsack Problem using Dynamic Programming approach. Even though it gives optimal solution to the problem, it is computationally complex to be implemented in real time encoders. In this thesis we attempt to solve the problem using Greedy heuristic approach. Since it's a heuristic approach, solution given by it may differ from the optimal solution. We evaluate the performance of Greedy heuristic approach both qualitatively and quantitatively and summarize the observations which can serve as reference for the developers. It has been verified that Greedy heuristic approach greatly reduces the SIP analyzer complexity both in time and in space without compromising much with the quality.


Electrical and Computer Engineering | Engineering


Degree granted by The University of Texas at Arlington