ORCID Identifier(s)

0000-0003-1167-0811

Graduation Semester and Year

2020

Language

English

Document Type

Dissertation

Degree Name

Doctor of Philosophy in Mechanical Engineering

Department

Mechanical and Aerospace Engineering

First Advisor

Dereje Agonafer

Abstract

Electronic products require high functional integration in small footprints with lower cost. At the same time, it is required to maintain effective communication between the IC’s and the electronic systems. Various challenges are arising due to these factors such as signal processing time, heat dissipation, structural integrity, chip package interaction which need to be dealt effectively during electronic packaging. 3D stacking of the processors and the components accomplishes these goals and in high computing application it reduces the delay. Through-silicon via (TSV) is the heart of 3D integration, and the stacking of chips is emerging now as a powerful tool to converge the demands of integrated circuit (IC) packages. In 3D TSV dies are stacked on top of another so heat trapped in a small region which is difficult to dissipate that may cause failures in electronic devices. Since the TSV’s go through dies, and dies have transistors, the transistors cannot be placed in a thermally stressed area. It is challenging to dissipate heat from the dies which are stacked. Due to the heat, thermal stresses developed at the interfaces of different materials, which causes structural integrity issues like cracking and warpage. According to coefficient of thermal expansion (CTE) values different materials try to expand and compress differently. Also, the interface of Si/SiO2 is brittle and hence crack can form in Cu core and in dielectric layer of TSV. In this study, structural integrity during die attachment process of a 2-die 3D TSV package is studied. Finite element methods have been used to examine the thermo-mechanical stresses and fracture parameters of the structure of 3D TSV package. The Stress intensity factor is analyzed thereby highlighting the prevalent modes of cracking in TSV. Stress intensity factor arising in the TSV and J-Integral with respect to design changes are studied at different crack positions on TSV. Electronic devices generally produce heat during normal operation. Heat dissipation of the semiconductor packages has become one of the limiting factors in miniaturization. Thermal interface material plays a significant role in the electronic devices for transferring heat since it enhances the heat transfer rate between contact surfaces. It is one of the essential materials used in electronic packages. When two solid surfaces are attached, there can be microvoids between the surfaces. These voids are generally filled by air, which increases the thermal resistance. Without good thermal contact, heat-dissipating devices cannot dissipate heat efficiently. For good thermal contact, thermal interface materials are needed. Characterization of the properties of thermal interface materials has gained importance since it plays a critical role in heat dissipation and life cycle of the electronic packages. Thermal interface materials are made of different compounds. Silicone is one of the compounds which is widely used in thermal gap filler materials. Also, there are thermal interface materials that do not contain silicone. In this study, silicone and silicone-free thermal interface materials are studied. Properties such as complex modulus, coefficient of thermal expansion, dielectric properties are studied, and the effect of silicon content is investigated. The effect of thermal aging on the properties of silicone based and silicone free thermal interface materials are also analyzed in this study.

Keywords

Reliability, Thermal interface material

Disciplines

Aerospace Engineering | Engineering | Mechanical Engineering

Comments

Degree granted by The University of Texas at Arlington

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